Currently, a widely applied network protection mechanism adopts a path layer protection/recovery technology, so as to realize a recovery of a network failure and achieve better whole network security. An active/standby switchover protection of a backplane service is one of the key technologies relevant to a protection/recovery mechanism of a path layer. In the OTN network, the active/standby switchover protection of the asynchronous backplane is a critical technology for survivability of the OTN network, and this technology requires that no loss occurs during the active/standby switchover of the asynchronous backplane, i.e., no bit error is generated, no clock performance is deteriorated during a normal active/standby switchover, and a switchover service is recoverable when an active/standby service fails.
In the conventional art, a lossless switchover of the asynchronous backplane usually adopts a switchover clock tracked by a phase-locked loop, as shown in FIG. 1. A Path 0 clock recovering unit performs a clock recovery on a Path 0 service, and outputs a Path 0 recovery service and a Path 0 recovery clock. A Path 0 random access memory (RAM) unit stores the Path 0 recovery service into the Path 0 RAM unit by using the Path 0 recovery clock. A Path 1 clock recovering unit performs a clock recovery on a Path 1 service, and outputs a Path 1 recovery service and a Path 1 recovery clock. A Path 1 RAM unit stores the Path 1 recovery service into the Path 1 RAM unit by using the Path 1 recovery clock.
The Path 0 recovery clock and the Path 1 recovery clock are output to a phase-locked loop for phase-locked tracking of the clock after the active/standby selection. That is, when a main path is switched to Path 0, the phase-locked loop automatically tracks the Path 0 recovery clock to obtain a switchover clock, and when the main path is switched to Path 1, the phase-locked loop automatically tracks the Path 1 recovery clock to obtain a switchover clock. The Path 0 RAM and the Path 1 RAM respectively buffer path service data, align the stored service data by using the switchover clocks, and output the data. Finally, through the active/standby selection control, the Path 0 aligned data output by the Path 0 RAM or Path 1 aligned data output by the Path 1 RAM are selected and output as the active/standby switchover data.
During researches and practices, the inventor finds that the conventional art has the following defects.
In the conventional art, each path requires a phase-locked loop to realize the active/standby clock switchover, so that the multi-path integration definitely increases the circuit implementation cost. Further, due to the limitation of the inherent tracking capability of the phase-locked loop, it takes some time for the phase-locked loop to lock the working path (main path) recovery clock during the service switchover, which may lead to a path RAM overflow. As a result, the output active/standby switchover data may appear to be “normal-error-normal”, so that the downstream network stations initiate an alarm, thereby affecting the protection mechanism of the whole network.